System Level Design from HW/SW to Memory for Embedded Systems : 5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, Foz do Iguaçu, Brazil, November 3–6, 2015, Proceedings / [electronic resource] : / edited by Marcelo Götz, Gunar Schirner, Marco Aurélio Wehrmeister, Mohammad Abdullah Al Faruque, Achim Rettberg.. — 1st ed. 2017.. — XII, 231 p. 92 illus. : online resource. — (IFIP Advances in Information and Communication Technology,) 523 1868-4238 ;. - IFIP Advances in Information and Communication Technology, 523 .

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Анотація:
This book constitutes the refereed proceedings of the 5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, held in Foz do Iguaçu, Brazil, in November 2015. The 18 full revised papers presented were carefully reviewed and selected from 25 submissions. The papers present a broad discussion on the design, analysis and verification of embedded and cyber-physical systems including design methodologies, verification, performance analysis, and real-time systems design. They are organized in the following topical sections: cyber-physical systems, system-level design; multi/many-core system design; memory system design; and embedded HW/SW design and applications.

ISBN: 9783319900230

Standard No.: 10.1007/978-3-319-90023-0 doi

Subjects--Topical Terms:
Special purpose computers.
Computer hardware.
Architecture, Computer.
Software engineering.
Special Purpose and Application-Based Systems.
Computer Hardware.
Computer System Implementation.
Software Engineering/Programming and Operating Systems.

LC Class. No.: TK7874.6

Dewey Class. No.: 004.6