000			04289nam a22005895i 4500
001			978-3-319-50380-6
003			DE-He213
005			20210118151946.0
007			cr nn 008mamaa
008			170110s2017 gw | s |||| 0|eng d
020			_a9783319503806 _9978-3-319-50380-6
024	7		_a10.1007/978-3-319-50380-6 _2doi
050		4	_aTK7888.4
072		7	_aTJFC _2bicssc
072		7	_aTEC008010 _2bisacsh
072		7	_aTJFC _2thema
082	0	4	_a621.3815 _223
245	1	0	_aFoundations of Hardware IP Protection _h[electronic resource] / _cedited by Lilian Bossuet, Lionel Torres.
250			_a1st ed. 2017.
264		1	_aCham : _bSpringer International Publishing : _bImprint: Springer, _c2017.
300			_aVII, 240 p. 125 illus., 48 illus. in color. _bonline resource.
336			_atext _btxt _2rdacontent
337			_acomputer _bc _2rdamedia
338			_aonline resource _bcr _2rdacarrier
347			_atext file _bPDF _2rda
505	0		_aDigital Right Management for IP Protection -- Turning Electronic Circuits Features into On-Chip Locks -- Logic Modification-Based IP Protection Methods: An Overview and a Proposal -- IP FSM Watermarking -- Side Channel Analysis, an Efficient Ally for IP Protection -- Hardware Obfuscation -- An application of Partial Hardware Reverse Engineering for the Detection of Hardware Trojan -- Linear Complementary Codes: Novel Hardware Trojan Prevention and Detection Approach -- Ultra-Lightweight Implementation in Area of Block Ciphers -- Enhancing Secure Elements – Technology and Architecture.
520			_aThis book provides a comprehensive and up-to-date guide to the design of security-hardened, hardware intellectual property (IP). Readers will learn how IP can be threatened, as well as protected, by using means such as hardware obfuscation/camouflaging, watermarking, fingerprinting (PUF), functional locking, remote activation, hidden transmission of data, hardware Trojan detection, protection against hardware Trojan, use of secure element, ultra-lightweight cryptography, and digital rights management. This book serves as a single-source reference to design space exploration of hardware security and IP protection. · Provides readers with a comprehensive overview of hardware intellectual property (IP) security, describing threat models and presenting means of protection, from integrated circuit layout to digital rights management of IP; · Enables readers to transpose techniques fundamental to digital rights management (DRM) to the realm of hardware IP security; · Introduce designers to the concept of salutary hardware, difficult to circumvent embedded hardware security systems.
650		0	_aElectronic circuits.
650		0	_aMicroprocessors.
650		0	_aElectronics.
650		0	_aMicroelectronics.
650	1	4	_aCircuits and Systems. _0http://scigraph.springernature.com/things/product-market-codes/T24068
650	2	4	_aProcessor Architectures. _0http://scigraph.springernature.com/things/product-market-codes/I13014
650	2	4	_aElectronics and Microelectronics, Instrumentation. _0http://scigraph.springernature.com/things/product-market-codes/T24027
700	1		_aBossuet, Lilian. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt
700	1		_aTorres, Lionel. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt
710	2		_aSpringerLink (Online service)
773	0		_tSpringer eBooks
776	0	8	_iPrinted edition: _z9783319503783
776	0	8	_iPrinted edition: _z9783319503790
776	0	8	_iPrinted edition: _z9783319843858
856	4	0	_uhttps://doi.org/10.1007/978-3-319-50380-6
912			_aZDB-2-ENG
999			_c452890 _d452890
942			_cEB
506			_aAvailable to subscribing member institutions only. Доступно лише організаціям членам підписки.
506			_fOnline access from local network of NaUOA.
506			_fOnline access with authorization at https://link.springer.com/
506			_fОнлайн-доступ з локальної мережі НаУОА.
506			_fОнлайн доступ з авторизацією на https://link.springer.com/